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Signetics
Signetics - 10K ECL Devices
The 10500/10100 series of emitter-coupled logic is the fastest logic technology available for practical use. A conventional planar process is used for the 10K ECL series with a density of about ten gates per mm2 and a delay of 2 ns per gate.
Select a Series Below
10K ECL DevicesBiploar LSI 2900 - 3000 & 8X00
Bipolar Memory 82S00, 82HS00, 82LS00
Controller/Peripheral 68172
DTL 100 - 400 & CS700, S8000
Linear 500 & 1400
Low Power Schottky TTL 54LS00 - 74LS00
LSI 9400
Schottky TTL 54S00 - 74S00
TTL 5400 - 7400
TTL 8200 & 8H00
TTL 8800
TTL 9000
TTL III 54H00 and 74H00
TTL Interface 8T00
Utilogic II 300
| Original # | Lansdale # | |
| 10100 | SL10100 | |
| 10101 | SL10101 | |
| 10102 | SL10102 | |
| 10103 | SL10103 | |
| 10104 | SL10104 | |
| 10105 | SL10105 | |
| 10106 | SL10106 | |
| 10107 | SL10107 | |
| 10108 | SL10108 | |
| 10109 | SL10109 | |
| 10110 | SL10110 | |
| 10111 | SL10111 | |
| 10113 | SL10113 | |
| 10114 | SL10114 | |
| 10115 | SL10115 | |
| 10116 | SL10116 | |
| 10117 | SL10117 | |
| 10118 | SL10118 | |
| 10119 | SL10119 | |
| 10121 | SL10121 | |
| 10123 | SL10123 | |
| 10124 | SL10124 | |
| 10125 | SL10125 | |
| 10129 | SL10129 | |
| 10130 | SL10130 | |
| 10131 | SL10131 | |
| 10132 | SL10132 | |
| 10133 | SL10133 | |
| 10134 | SL10134 | |
| 10135 | SL10135 | |
| 10136 | SL10136 | |
| 10137 | SL10137 | |
| 10141 | SL10141 | |
| 10158 | SL10158 | |
| 10159 | SL10159 | |
| 10160 | SL10160 | |
| 10161 | SL10161 | |
| 10162 | SL10162 | |
| 10164 | SL10164 | |
| 10165 | SL10165 | |
| 10171 | SL10171 | |
| 10172 | SL10172 | |
| 10173 | SL10173 | |
| 10174 | SL10174 | |
| 10175 | SL10175 | |
| 10176 | SL10176 | |
| 10179 | SL10179 | |
| 10180 | SL10180 | |
| 10181 | SL10181 | |
| 10188 | SL10188 | |
| 10189 | SL10189 | |
| 10192 | SL10192 | |
| 10610 | SL10610 | |
| 10611 | SL10611 | |
| 10616 | SL10616 | |
| 10631 | SL10631 |
| Package Types |
| E - 16-LEAD DUAL INLINE (1/4" X 7/8") |
| F - 16-LEAD FLAT PACK (1/4" X 3/8") |
| J - 24-LEAD DUAL INLINE (1/2" X 1 1/4") |
| K - 24-LEAD FLAT PACK (3/8" X 5/8") |
| Rating | Value | Unit |
| Supply Voltage - VCC | -8.0 | V |
| Input Voltage - Vin | 0 to VEE | V |
| Output Source Current | -50 | mA |
| Military Operating Temperature Range | -55 to +125 | ?C |
| Commercial Operating Temperature Range | 0 to +70 | ?C |
| ?C |
| Array |
| Quad 2-Input NOR Gate w/Strobe |
| Quad 2-Input OR/NOR Gate w/Strobe |
| Quad 2-Input NOR Gate |
| Quad 2-Input OR Gate |
| Quad 2-Input AND Gate |
| Triple 2-3-2 Input OR/NOR Gate |
| Triple 4-3-3 Input NOR Gate |
| Triple 2-Input Exclusive OR/Exclusive NOR Gate |
| Dual 4-Input AND/NAND Gate |
| Dual 4-5 Input OR/NOR Gate |
| Dual 3-Input/3-Output OR Gate |
| Dual 3-Input/3-Output NOR Gate (Line Driver) |
| Quad Exclusive OR Gate w/Enable |
| Triple Differential Line Receiver |
| Quad Differential Line Receiver |
| Triple Differential Line Receiver |
| Dual 2-Wide 2-3 Input OR-AND/OR-AND-INVERT Gate |
| Dual 2-Wide 3-Input OR-AND Gate |
| 4-Wide 4-3-3-3 Input OR-AND Gate |
| 4-Wide OR-AND/OR-AND-INVERT Gate |
| Triple 4-3-3 Input Bus Driver |
| Quad TTL-to-ECL Translator |
| Quad ECL-to-TTL Translator |
| Bus Receiver |
| Dual D Type Latch |
| Dual D Type Master-Slave Flip-Flop |
| Dual 2-Input Multiplexer w/Clocked Latch & Reset |
| Quad Latch w/D Type Inputs & Enable Outputs |
| Dual 2-Input Multiplexer w/Clocked D Type Latches |
| Dual J-K Master-Slave Flip-Flop |
| Universal Hexadecimal Counter |
| Universal Decade Counter |
| 4-Bit Universal Shift Register |
| Quad 2-to-1 Multiplexer (Non-Inverting) |
| Quad 2-to-1 Multiplexer (Inverting) |
| 12-Bit Parity Checker/Generator |
| 1-of-8 Decoder w/2 Enable Inputs (Active Low Outputs) |
| 1-of-8 Decoder w/2 Enable Inputs (Active High Outputs) |
| 8-Input Multiplexer w/Enable Input |
| 8-Input Priority Encoder |
| Dual 1-of-4 Decoder (Active Low Outputs) |
| Dual 1-of-4 Decoder (Active High Outputs) |
| Quad 2-Input Multiplexer w/Latched Outputs |
| Dual 4-to-1 Multiplexer w/Output Enable |
| Quint D-Latch w/Common Reset |
| Hex D Type Master-Slave Flip-Flop |
| Look-Ahead Carry Block |
| Dual 2-Bit Adder/Subtractor |
| 4-Bit Arithmetic Logic Unit/Function Generator |
| Hex Buffer w/Enable (Non-Inverting) |
| Hex Inverter w/Enable |
| Quad Bus Driver |
| High-Speed Dual 3-Input/3-Output OR Line Driver |
| High-Speed Dual 3-Input/3-Output NOR Line Driver |
| Triple Differential OR/NOR Line Receiver |
| Dual D Type Master-Slave Flip-Flop |
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